1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device. More particularly, the present invention relates to a method of manufacturing a dual-cylinder bottom electrode of a capacitor.
2. Description of the Related Art
DRAM is applied broadly in the field of integrated circuits devices, and more importantly, in the electronics industry. DRAMs with higher capacitance are necessary for the development of the industry. As a result, DRAMs with higher density and capacitance are of great interest and are developed by the related industry. How to keep the quality as the size of the device is reduced is now a task for the industry to overcome.
Typically, in highly integrated DRAM process, a three-dimensional capacitor is commonly used since the three-dimensional capacitor can provide a relatively large capacitance. The three-dimensional capacitor comprises stacked-type capacitors, trench-type capacitors, cylinder-type capacitors, etc.
FIG. 1 is a schematic, cross-sectional view of a bottom electrode of a conventional cylinder capacitor.
As shown in FIG. 1, a substrate 100 having gate electrodes 120 and an isolation region 110 is provided. A communal source/drain region 130 is formed in the substrate 100 between two gate electrodes 120. A silicon oxide layer 140 and a silicon nitride layer 150 are formed over the substrate 100 in sequence. A node contact hole 160 is formed to penetrate through the silicon oxide layer 140 and the silicon nitride layer 150 and expose the communal source/drain region 130. A node contact is formed to fill the node contact hole 160. A spacer 180 is formed on a portion of the sidewall of the node contact 170 protuberating from the node contact hole 160. The node contact 170 and the spacer 180 together form a bottom electrode 170 electrically coupled to the communal source/drain region 130 through the node contact 170.
As the size of the semiconductor devices is gradually decreased, the size of the node contact hole will be limited by the resolution of the photolithography. Hence, the shrinkage of the semiconductor devices is greatly limited. The enlargement of the surface of the cylinder capacitor is also limited.